1 files changed, 10 insertions, 5 deletions

diff --git a/src/uart.c b/src/uart.c
index c5823e8..bb2a0ea 100644
--- a/src/uart.c
+++ b/src/uart.c
@@ -1,3 +1,7 @@
+/*
+References:
+  https://wiki.osdev.org/Raspberry_Pi_Bare_Bones
+*/
 #include <uart.h>
 
 #include <gpio.h>
@@ -6,7 +10,8 @@
 enum
 {
     // The base address for UART.
-    UART0_BASE = (GPIO_BASE + 0x1000), // for raspi4 0xFE201000, raspi2 & 3 0x3F201000, and 0x20201000 for raspi1
+    // For raspi4 0xFE201000, raspi2 & 3 0x3F201000, and 0x20201000 for raspi1.
+    UART0_BASE   = (GPIO_BASE + 0x1000),
     // The offsets for reach register for the UART.
     UART0_DR     = (UART0_BASE + 0x00),
     UART0_RSRECR = (UART0_BASE + 0x04),
@@ -48,13 +53,13 @@ void uart_init(int raspi) {
   // Disable UART0.
   mmio_write(UART0_CR, 0x00000000);
   
-  // Setup the GPIO pin 14 && 15.
+  // Set up GPIO pins 14 and 15.
 
-  // Disable pull up/down for all GPIO pins & delay for 150 cycles.
+  // Disable pull up/down for all GPIO pins.
   mmio_write(GPPUD, 0x00000000);
   delay(150);
 
-  // Disable pull up/down for pin 14,15 & delay for 150 cycles.
+  // Disable pull up/down for pins 14-15.
   mmio_write(GPPUDCLK0, (1 << 14) | (1 << 15));
   delay(150);
 
@@ -90,7 +95,7 @@ void uart_init(int raspi) {
   // Enable FIFO & 8 bit data transmission (1 stop bit, no parity).
   mmio_write(UART0_LCRH, (1 << 4) | (1 << 5) | (1 << 6));
 
-  // Mask all interrupts.
+  // Disable all interrupts.
   mmio_write(UART0_IMSC, (1 << 1) | (1 << 4) | (1 << 5) | (1 << 6) |
                          (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10));