From 2dd1239ae661a1704c94501bbfc46afd4ca94863 Mon Sep 17 00:00:00 2001 From: 3gg <3gg@shellblade.net> Date: Sat, 8 Feb 2025 18:14:45 -0800 Subject: Comment. --- src/mmio.c | 9 +++++++++ src/raspi.c | 4 ++++ src/uart.c | 15 ++++++++++----- 3 files changed, 23 insertions(+), 5 deletions(-) diff --git a/src/mmio.c b/src/mmio.c index 47ef354..e082d66 100644 --- a/src/mmio.c +++ b/src/mmio.c @@ -1,5 +1,12 @@ +/* +References: + https://wiki.osdev.org/Raspberry_Pi_Bare_Bones + https://jsandler18.github.io/extra/peripheral.html + https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf +*/ #include +// Peripheral base address. static void* MMIO_BASE; void mmio_init(int raspi) { @@ -11,6 +18,8 @@ void mmio_init(int raspi) { } } +// All MMIO registers are 32-bit. + #define REG_ADDR(reg) ((volatile uint32_t*)(MMIO_BASE + reg)) uint32_t mmio_read(uint32_t reg) { diff --git a/src/raspi.c b/src/raspi.c index bc76f89..ff9ab33 100644 --- a/src/raspi.c +++ b/src/raspi.c @@ -1,3 +1,7 @@ +/* +References: + https://wiki.osdev.org/Detecting_Raspberry_Pi_Board +*/ #include #include diff --git a/src/uart.c b/src/uart.c index c5823e8..bb2a0ea 100644 --- a/src/uart.c +++ b/src/uart.c @@ -1,3 +1,7 @@ +/* +References: + https://wiki.osdev.org/Raspberry_Pi_Bare_Bones +*/ #include #include @@ -6,7 +10,8 @@ enum { // The base address for UART. - UART0_BASE = (GPIO_BASE + 0x1000), // for raspi4 0xFE201000, raspi2 & 3 0x3F201000, and 0x20201000 for raspi1 + // For raspi4 0xFE201000, raspi2 & 3 0x3F201000, and 0x20201000 for raspi1. + UART0_BASE = (GPIO_BASE + 0x1000), // The offsets for reach register for the UART. UART0_DR = (UART0_BASE + 0x00), UART0_RSRECR = (UART0_BASE + 0x04), @@ -48,13 +53,13 @@ void uart_init(int raspi) { // Disable UART0. mmio_write(UART0_CR, 0x00000000); - // Setup the GPIO pin 14 && 15. + // Set up GPIO pins 14 and 15. - // Disable pull up/down for all GPIO pins & delay for 150 cycles. + // Disable pull up/down for all GPIO pins. mmio_write(GPPUD, 0x00000000); delay(150); - // Disable pull up/down for pin 14,15 & delay for 150 cycles. + // Disable pull up/down for pins 14-15. mmio_write(GPPUDCLK0, (1 << 14) | (1 << 15)); delay(150); @@ -90,7 +95,7 @@ void uart_init(int raspi) { // Enable FIFO & 8 bit data transmission (1 stop bit, no parity). mmio_write(UART0_LCRH, (1 << 4) | (1 << 5) | (1 << 6)); - // Mask all interrupts. + // Disable all interrupts. mmio_write(UART0_IMSC, (1 << 1) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10)); -- cgit v1.2.3